Ok, the Biospages give me this info:

$0038 C3 0C3C ;JP KEYINT

$0C3C
Push HL
Push DE
Push BC
Push AF
EXX
EX AF,AF' (In Wbass2 there is no AF', so I type: EX AF,AF)
Push HL
Push DE
Push BC
Push AF
Push IY
Push IX
CALL H,KEYI ;I guess this means CALL LINESPLIT

Ok, then at my linesplit I start with a POP to POP the CALL H,KEYI (pop SP)
like this:

POP AF ;or whatever register

and then I pop everything above in reverse:

POP IX
POP IY
POP AF
POP BC
POP DE
POP HL
EX AF,AF
EXX
POP AF
POP BC
POP DE
POP HL
EI
RET


however, it doesnt work.

confusing? jup!
just remember:

- MSX has 4 "pages"
page0 0x0000-0x3FFF
page1 0x4000-0x7FFF
page2 0x8000-0xBFFF
page3 0xC000-0xFFFF

- Each page has a PRIMAIRY slot (max 4 prim slots per page)
in your case the prim.slot=3
most slots are ROM based, one is RAM. ROM examples: ROM BIOS, DISK ROM, BASIC ROM etc.

- Each prim.slot can hold another 4 sub slots
in your case the sub.slot=2

- Each page can hold a memory mapper number (only to use when page is set to RAM)

Quote:

Ok, the Biospages give me this info: $0038 C3 0C3C ;JP KEYINT $0C3C Push HL Push DE Push BC Push AF EXX EX AF,AF' (In Wbass2 there is no AF', so I type: EX AF,AF) Push HL Push DE Push BC Push AF Push IY Push IX CALL H,KEYI ;I guess this means CALL LINESPLIT Ok, then at my linesplit I start with a POP to POP the CALL H,KEYI (pop SP) like this: POP AF ;or whatever register and then I pop everything above in reverse: POP IX POP IY POP AF POP BC POP DE POP HL EX AF,AF EXX POP AF POP BC POP DE POP HL EI RET however, it doesnt work.

The POPs are correct.
Dunno about the correct "call" tho... someone else might.

Here's an exerpt from my int stuff (taken from the f-kernel manual)

3.3.3	Interrupts

Interrupts are managed in a totaly different manner as they are in the standard MSX-OS.
Who doesn’t hate the relocating of interrupt hooks on address #FD9A and #FD9F?! Let’s
first look at the code that’s always called when an interrupt occurs.

When runnin MIDAS, interrupt mode 1 is enabled. On address #38 a jump (“JP”) is located
to the standard MIDAS ISR.
(ISR stands for: Interrupt Service Routine)


		ORG	#38
		JP	ISR

ISR:		PUSH		AF
		IN 		A,(#99)	;Assume VDP r#15=0
		RLCA
LNIISR:	JP		NC,LNI_00	;LNI vector (set via SETLNI)
		PUSH 	BC
		PUSH 	DE
		PUSH 	HL
		EX 		AF,AF
		EXX
		PUSH 	AF
		PUSH		BC
		PUSH 	DE
		PUSH		HL
		PUSH		IX
		PUSH		IY
		LD		HL,TIMER	;VBL timer (#FC9E)
		INC		(HL)
		CALL		VBLISR	;VBL vector
		POP 		IY
		POP		IX
		POP		HL
		POP		DE
		POP		BC
		POP		AF
		EXX
		EX 		AF,AF
		POP		HL
		POP		DE
		POP		BC
LNI_00	POP		AF
		EI
		RET

Quote:

Quote: (confusing eh) pfffffffffff *-*

Nori: read this
It's an article, in dutch, about the MSX memory structure. That should lift some of the fog I think :-)

Quote:

ORG #38 JP ISR ISR: PUSH AF IN A,(#99) ;Assume VDP r#15=0 RLCA LNIISR: JP NC,LNI_00 ;LNI vector (set via SETLNI) PUSH BC PUSH DE PUSH HL EX AF,AF EXX PUSH AF PUSH BC PUSH DE PUSH HL PUSH IX PUSH IY LD HL,TIMER ;VBL timer (#FC9E) INC (HL) CALL VBLISR ;VBL vector POP IY POP IX POP HL POP DE POP BC POP AF EXX EX AF,AF POP HL POP DE POP BC LNI_00 POP AF EI RET

this is code you wrote yourself?
Hmmm, I still dont see why mine doesnt work:

At Linesplit:
POP AF
POP IX
POP IY
POP AF
POP BC
POP DE
POP HL
EX AF,AF
EXX
POP AF
POP BC
POP DE
POP HL
EI
RET

what wrong here?

Quote:

however, it doesnt work.

Just a silly thought, but what code did you put at the HKEYI address ($fd9a) to get to your linesplit code? If you've written a CALL at $fd9a to call your code then of course there's one more return address to pop off the stack...

no not necessary. the extra pop is just for the RST#38 to skip on return.
why doesn't it work? I think we should indeed see the whole code. remember you have to RESET the LNI int. I should update my intr.skills again cuz I can't even remember exaclty how to. gotta check my code again gheh.

YES FIXED IT !!
THANX KANIMA

There was indeed an extra Call I needed to POP.
I use an extra call at the lineint to CALL the lineint routine.

ah, yeah. ofcourse. sorry I keep forgetting you're using HOOKS which are only 5 bytes. why CALL why not JUMP? (you'd return to fd9a an imediately RET.. whaz the point)
so you're stack was stucked.

it's funny how we asume others to put up code. ghehe.

Quote:

why CALL why not JUMP?

No more Call !!

you can call me AL....

I was thinking.
If I want to set page 0 to RAM,
then at each INT a RST $38 is made.
Can I change this address?
Lets say I want every INT a JP $1000 (or whatever) in stead of
RST $38.

No! You cannot.
You must set your code at 38$ (e.g. a JP 1000$) in order to get the interrupts.
This is a flaw in the MSX architecture, whatever IM0,1,2 you set, you get always a RST at 38$.
The other solution is: avoid iterrupts, just work all the time with DI, using VDP polling instead.
This is the best way for having clean screensplit, as you know and can control each single
Tcycle that the z80 is processing. Vscreen uses (almost) this solution and you can see the results

Quote:

The other solution is: avoid iterrupts, just work all the time with DI, using VDP polling instead. This is the best way for having clean screensplit, as you know and can control each single Tcycle that the z80 is processing.

very interresting.
Another interesting thing is this:
I just found this info on the net:

_________________________________________________________________________
The Z80 supports three interrupts modes which can be selected by IM 0, IM 1, and IM 2 instructions. The table below describes the respective operation and execution time upon interrupt execution in each mode.

Mode Cycles Refresh Operation
0 1+var 0+var IFF=0, read and execute opcode from databus
1 12 1 IFF=0, CALL 0038h
2 18 1 IFF=0, CALL (I*100h+databus)

Mode 0 requires an opcode to be output to the databus by external hardware, in case that no byte is output, and provided that the 'empty' databus is free of garbage, then the CPU might tend to read a value of FFh (opcode RST 38h) - the clock cycles, refresh cycles, and executed operation are then fully identical as in Mode 1.
Mode 1 interrupts always perform a CALL 0038h operation. The downside is that many systems may have ROM located at this address, making it impossible to hook the interrupt handler directly.

Mode 2 calls to a 16bit address which is read from a table in memory, the table pointer is calculated from the "I" register (initialized by LD I,A instruction) multiplied by 100h, plus an index byte which is read from the databus. The following trick may be used to gain stable results in Mode 2 even if no index byte is supplied on the databus: For example, set I=40h the origin of the table will be then at 4000h on memory. Now fill the entire area from 4000h to 4100h (101h bytes, including 4100h) by the value 41h. The CPU will then perform a CALL 4141h upon interrupt execution - regardless of whether the randomized index byte is a even or odd number.
_________________________________________________________________________

I conclude that if this is my code:
LD I,$40
IM2

that then each int a jump is made to $4000 (plus an index byte which is read from the databus)
and no longer to $38

But what is a good way to avoid this index byte?

___________________________________________________
Now fill the entire area from 4000h to 4100h (101h bytes,
including 4100h) by the value 41h. The CPU will then
perform a CALL 4141h upon interrupt execution - regardless
of whether the randomized index byte is a even or odd number.
___________________________________________________

hmmm, i bit spaceconsuming, isnt it?

Actually this seems a complicated solution to a simple problem.

A part from the waste of space (you pointed by yourself),
when interrupt occurs you do a call to 4141$.

At 4141$ you have to do ints managemnet by yourself.

Now, you do not need to handle all the bios actions,
your sole goal is to wait for FH and setting vdp regs.

so what is the point in playing havoc with the ints, when you can
disable ints and do polling for FH?

It is easyer and error safe.

And you can switch ram pages (included page0) at you willing!!!