@ARTRAG
In order to check which secondary slot your code is running from (in page 0) you need to (temporarily) set page 3 to the same primary slot as page 0. Then you can read from $FFFF of the primary slot that your code is in.

do you mean like this ?

; set pages and subslot

    in a,(0xA8)                  
    and 0xC0
    ld b,a                  ; which slot is for ram (page 3)?

    in a,(0xA8)              
    and 3                   ; which slot are we (page 0)?
    ld c,a     
    
    sla a
    sla a
    or c
    sla a
    sla a
    or c
    or b
    
    ld e,a                  ; page 0,1 & 2 are at the same primary slot of page 0
                            ; page 3 stay unchanged
    rrc c
    rrc c
    in a,(0xA8)                  
    and 0xC0
    or c
    out (0xA8),a            ; page 3 is set to the same primary slot of 0

    ld a,(-1)
    cpl
    and 0xC0                 ; which sub slot is page 3?
    ld b,a     
    
    ld a,(-1)
    cpl
    and 3                   ; which sub slot are we?
    ld c,a     
    
    sla a
    sla a
    or c
    sla a
    sla a
    or c
    or b
    ld (-1),a               ; page 0,1 & 2 are at the same secondary slot of page 0
                            ; page 3 has the same value of before
                            
    ld a,e
    out (0xA8),a            ; page 0,1 & 2 are at the same primary slot of page 0
                            ; page 3 stay unchanged

I cannot find if there is a bug of something I do not understand, but the code hangs...

there is a bug in this part:

Quote:

rrc c rrc c in a,(0xA8) and 0xC0 or c out (0xA8),a ; page 3 is set to the same primary slot of 0

I think you want and 0x3F

Also, what if the slot is not even expanded?

I see...
I will try on friday

actually I do not see why i need and 0x3f
I was trying to get the same primary slot of page 0 in all pages 0 1 and 2
if I do and 0x3f I get the current address of the 3 pages ( that I do not need )
maybe I an missing something....

what sould I do in th power-up code to enable in page 1 and 2 the same slot and subslots I find o page zero ?

why this code does not work?


; set pages and subslot

in a,(0xA8)
and 0xC0
ld b,a ; which slot is for ram (page 3)?

in a,(0xA8)
and 3 ; which slot are we (page 0)?
ld c,a

sla a
sla a
or c
sla a
sla a
or c
or b

ld e,a ; page 0,1 & 2 are at the same primary slot of page 0
; page 3 stay unchanged
rrc c
rrc c
ld a,b
or c
out (0xA8),a ; page 3 is set to the same primary slot of 0

ld a,(-1)
cpl
and 3 ; which sub slot are we?
ld c,a

sla a
sla a
or c
sla a
sla a
or c
ld (-1),a ; page 0,1 & 2 are at the same secondary slot of page 0
; page 3 has the same value of before

ld a,e
out (0xA8),a ; page 0,1 & 2 are at the same primary slot of page 0
; page 3 is set to 0

Quote:

rrc c rrc c ld a,b or c out (0xA8),a ; page 3 is set to the same primary slot of 0

This part again doesn't do what you say it does. After rrc c, you have the desired slot for page 0/1/2 in the top two bits of c. You want to write this to $A8 to get page 3 to the same slot, so you can access the register at $FFFF. But, you also need not to change the slot of page 0 where your code is running.

Try the change I suggested before or try the code I posted on the first page of this thread.

Unfortunately your code cannot work in my case as I heve the rom signature at 0000h (page 0)
while, AFAI undestand, your code expects to have AB at 4000h (page 1)

moreover I tryed you pach to my cone but it doesn't work...

this is the code I use currently

; set pages and subslot

     in a,(0xA8)
     and 0xC0
     ld b,a             ; which slot is for ram (page 3)?

     in a,(0xA8)
     and 3              ; which slot are we in (for page 0)?
     ld c,a

     sla a
     sla a
     or c
     sla a
     sla a
     or c
     or b

     ld e,a             ; page 0,1 & 2 are at the same primary slot of page 0
                        ; page 3 stay unchanged
     rrc c
     rrc c
     in a,(0xA8)
     and 0x3F
     or c
     out (0xA8),a       ; page 3 is set to the same primary slot that was of page 0

     ld a,(-1)
     cpl
     and 0xC0
     ld b,a             ; which sub slot is for ram (at page 3)?    

     ld a,(-1)
     cpl
     and 3              ; which sub slot are we in (for page 0)?
     ld c,a

     sla a
     sla a
     or c
     sla a
     sla a
     or c
     or b
     ld (-1),a          ; page 0,1 & 2 are at the same sub slot of page 0
                        ; page 3 has subslot unchanged

     ld a,e
     out (0xA8),a       ; page 0,1 & 2 are at the same primary slot of page 0
                        ; page 3 is unchanged

It runs only in CBIOS msx1 but not in any other configuration....

it looks correct now

What should I look for in the basic rom to undserstand if my rom is executed or not ?
I use the debugger of bluemsx, do you know how to put a breackpoint at an address of a given slot/subslot ?

This is the complete source of the rom boot sequence.
I have corrected some errors and now the ROM is recognized by all the C-BIOS roms (msx1,2 & 2+)
but NOT by the standard MSX roms.
They simply ignore my rom and go to basic

;
; $Id: myrtz80-s.as,v 0.01 31/08/2006 11:45:15 art rag $
;
; Runtime startoff module Z80 compiler.  ROM version
;
; 
;
    psect   text,global,pure,class=CODE
    psect   vectors,ovrld,global,pure,class=CODE
    psect   lowtext,class=CODE
    psect   data,global,class=DATA
    psect   bss,global,class=DATA
    psect   stack,global,class=DATA
    psect   strings,global,pure,class=CODE
    psect   const,global,pure,class=CODE
    psect   baseram,global,class=DATA,reloc=1000h
    psect   im2vecs,ovrld,class=CODE
    psect   ramstart,global,class=DATA
    psect   heap,global,class=DATA
    psect   nvram,global,class=DATA

    global  small_model
small_model equ 1

    psect   vectors

    
    global  start,_main,_exit,__Hstack,__Hbss, __Lbss
    global  __Ldata, __Hdata, __Lconst

;   MSX ROM Header

    org 0000h

    defb 'A','B'
    defw start


    org 0038h

SAT equ   0x1b00       ; Sprite Attribute Table    

    global  _vdps0, _curr_plan, _n_sprt, _sprt

;   RST 38 handler

    ex  af,af'
    exx
   
    in  a,(0x99)
    ld  (_vdps0),a

    bit 06h,a
    jp  z,3f            
                
    and 31
    add a,a
    add a,a
    ld  b,a
    ld  a,(_curr_plan)
    add a,b
    ld  e,a                 ; curr_plan + = (vdps0 & 31)*4;

    ld  a,(_n_sprt)
    ld  c,a

;   In A rest of E / C

    xor a
    ld b,8
2:
    rl e
    rla
    sub c
    jr nc,1f
    add a,c
1:
    djnz 2b

    and a
    jp  z,3f                        

    ld  (_curr_plan),a      ; curr_plan -= (curr_plan/(n_sprt)) * (n_sprt);
    ld  e,a

    ld  a,SAT & 255
    out (0x99),a
    ld  a,SAT/256 | 64
    out (0x99),a

    ld  hl,_sprt
    ld  d,0
    add hl,de           ; hl = sprt + curr_plan
    ld  c,0x98
    ld  a,(_n_sprt)
    sub e
    ld  b,a             ;  b = n_sprt -curr_plan
    otir
    ld  hl,_sprt        ; hl = sprt
    ld  b,e             ;  b = curr_plan
    otir
    jp    1f
3:
    ld  a,SAT & 255
    out (0x99),a
    ld  a,SAT/256 | 64
    out (0x99),a

    xor a
    ld  (_curr_plan),a

    ld  hl,_sprt
    ld  c,0x98
    ld  a,(_n_sprt)
    ld  b,a
    otir
    
1:
    ld  a,208
    out (0x98),a    
    
    ex  af,af'
    exx
    ei
    ret

start:
    di
    ld  sp,__Hstack-1   ;top of stack area
    inc sp
    ld  de,__Lbss   ;Start of BSS segment
    or  a       ;clear carry
    ld  hl,__Hbss
    sbc hl,de       ;size of uninitialized data area
    ld  c,l
    ld  b,h
    dec bc  
    ld  l,e
    ld  h,d
    inc de
    ld  (hl),0
    ldir            ;clear memory

;   now copy data psect if necessary

    ld  hl,seg __Ldata
    ld  de,seg __Lconst
    or  a
    sbc hl,de
    jr  z,1f
    ld  hl,seg __Ldata
    ld  de,__Ldata  ;get load and link base of data psect
    or  a
    sbc hl,de       ;subtract and compare
    jr  z,1f        ;same - no copying to be done
    ld  hl,__Hdata  ;get top to find size
    or  a
    sbc hl,de       ;calculate size
    jr  z,1f        ;zero, still nothing to be done
    ld  c,l
    ld  b,h     ;move count to BC
    ld  hl,seg __Ldata  ;get source address again
    ldir            ;copy it

1:

; set pages and subslot

    in a,(0xA8)
    and 0xC0
    ld b,a             ; which slot is for ram (page 3)?

    in a,(0xA8)
    and 3              ; which slot are we in (for page 0)?
    ld c,a

    sla a
    sla a
    or c
    sla a
    sla a
    or c
    or b

    ld e,a             ; page 0,1 & 2 are at the same primary slot of page 0
                       ; page 3 stay unchanged
    rrc c
    rrc c
    in a,(0xA8)
    and 0x3F
    or c
    out (0xA8),a       ; page 3 is set to the same primary slot that was of page 0

    ld a,(-1)
    cpl
    and 0xC0
    ld b,a             ; which sub slot is for ram (at page 3)?    

    ld a,(-1)
    cpl
    and 3              ; which sub slot are we in (for page 0)?
    ld c,a

    sla a
    sla a
    or c
    sla a
    sla a
    or c
    or b
    ld (-1),a          ; page 0,1 & 2 are at the same sub slot of page 0
                       ; page 3 has subslot unchanged

    ld a,e
    out (0xA8),a       ; page 0,1 & 2 are at the same primary slot of page 0
                       ; page 3 is unchanged


;   Run the main
    call    _main
    signat  _exit,4152
_exit:
    jp  start           ; reset




    psect   bss
;
;   Vector table used by "set_vector()"
;   ***Dummy: needed by the compiler
;
__vectors:
bdosvec:    defs    3

Any idea ? If someone has an Idea I can send him the resulting rom (that boots only in c-bios)

I don't think it's gonna work if you don't burn it to ROM. To emulate this, make sure the file is exactly 16KB long and then copy it after it self to make it 32KB ROM. I don't know emulators too well, but if you find something like "16KB mirrored" it might do the trick as well.

Idea is to ignore at least bit 15 of the address bus. In this case other high bits can be ignored as well, but to make it boot whole address should not be handled. Copying 16KB file to it self emulates ignoring bits 14 & 15. (Ignore = not connected)

But this means that I cannot use this trick in 48K roms or in any other rom with size >16K !!
This is very strange as Crazy Train is 32K and has AB at 0000h (and not at 4000h) and seems to work
without setting the pages...
How does it happen?

I think, that you can find a copy of the 32KB ROM in #8000