DPF-550 Floppy drive

This AVT model DPF-550, is it accessing the controller through memory addresses or I/O ports? I can't tell from schematic linked above, it's almost unreadable in places. It should be easy to tell when you check the low-level routines with a debugger...

Of course if you have a memory-driven interface the diskROM should be too, and same if it's talking to the controller via I/O ports. If ports / memory addresses are different from what you need, you might be in a world of hurt ,but usually hardware configurations follow one of a select few, with some minor differences at most.

I found something better, the original daewo scheme draw.
http://3.bp.blogspot.com/_lGdEZweweRo/S9EbwfPKEJI/AAAAAAAAALE/6xnmJei8qcI/s1600/dpf550sche.jpg
and here is the datasheet of WD chip
http://www.datasheetarchive.com/WD1772-datasheet.html
I found that you are right, D3 at 7fbc is controlling the switching DDEN of WD (FM vs MFM compression aka SD vs DD).
But I do not remember that in my Talent model, maybe in my talent model it is fixed to DD. & D3 controls Motor ON.
IC8 is the holder of the 7fbc / bfbc register WRITE ONLY register.

Thanks for the schemes.
After studying AVT interface, i found that both are very similar.

AVT model, first decodes base port 0xD0 and do the EPROM selection (Yes, 2x8KB EPROM are used here too).
After it, the rest of the board is the same. I will explain:

 port			read			write

D0 - WD1770 control: 	Status Register		Command Register
D1 - 			Track Register		Track Register
D2 -			Sector Register		Sector Register
D3 - 			Data Register		Data Register

D4 - Drive select:

	bit 7 6 5 4 3 2 1 0
	    x x x x | | | |__ /DS0
	            | | |____ /DS1
	            | |______ /SIDE SEL
	            |________ /DDEN

     To enable signal, set correspondant bit to 1, as bits value are inverted by a 7406 chip.

     The WD1770 has two modes of operation according to the state /DDEN (Pin 26).
     When /DDEN=1, single density is selected. Set bit 3 0 to enable double density.

Correction:
Port D4 is used to read IRQ and DRQ status.
Port D5 is used to write DS0, DS1 , SIDE and DDEN dignals.

D4 read & D4 write do you means... not D5

Not really.
At first, i thought that D4 was used to both read and write (as Brazilian Microsol does) but, after editing diskrom, i found that port D5 was used to write and port D4 only to read.

I think i will have to re-check circuitry and make sure where every signal is located.

I have drawn schemes but not all of them. I just checked some connections and figured out that it was similar to Daewoo DPF-550, but this is not correct. It seems that Daewoo make some small changes in the boards, maybe to correct some bugs or make models incompatible...

Any idea whether the original Daewoo DPF-550 is port based, like the AVT, or memory based, like the Talent?