Disassembling Juno First

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Por Metalion

Paragon (1589)

Imagen del Metalion

29-07-2022, 18:12

NYYRIKKI wrote:

Ok, this part I still fail to see on you message, but can you copy/paste example? Maybe there is something that just does not meet the eye.

(HL) contains a series of values, but they do not have importance, as DE is used to set up VRAM read/write (made by RST 28h), and in the loop, 'D' will contain 80h,81h,82h, ... 87h. Therefore, bit 14 of the address sent to the VDP is zero, which will send a reading command. But they do not fetch the data anywhere in the loop...

; reads 8 VRAM addresses (but does not fetch data?)
T4324h	214E1D..  !N..	LD	HL,01D4Eh
T4327h	0608....  ....	LD	B,008h
T4329h	1680....  .€..	LD	D,080h
T432Bh	5E......  ^...	LD	E,(HL)
T432Ch	EF......  ï...	RST	40			; sends DE to (98h)
T432Dh	23......  #...	INC	HL
T432Eh	14......  ....	INC	D
T432Fh	10FA....  .ú..	DJNZ	0FAh			; Jump to 0432BH

Por Grauw

Ascended (10633)

Imagen del Grauw

29-07-2022, 18:55

Read my reply on the previous page:

Grauw wrote:
Metalion wrote:

but it does not make the code more understandable.
The loop sends 8 16-bit values consecutively to the VDP port 99h, that do stricly nothing:

- 8000h : read 0000h (but it does not fetch the data)
- 8162h : read 0162h (but it does not fetch the data)
- 8201h : read 0201h (but it does not fetch the data)
- 831Eh : read 031Eh (but it does not fetch the data)
- 8401h : read 0401h (but it does not fetch the data)
- 850Eh : read 050Eh (but it does not fetch the data)
- 8600h : read 0600h (but it does not fetch the data)
- 8701h : read 0701h (but it does not fetch the data)

If bit 7 of the high byte is set it is a register write. So it initializes VDP registers 0-7. Unless I misunderstand what you wrote there.

Additionally,

Metalion wrote:
T432Ch	EF......  ï...	RST	40			; sends DE to (98h)

I presume this is 99H like you said before, not 98H.

Por Metalion

Paragon (1589)

Imagen del Metalion

29-07-2022, 19:03

Yes, of course, register write ... oO
Sorry I must have been completely blind, I was focused on VRAM writing.

Por ducasp

Hero (608)

Imagen del ducasp

30-07-2022, 04:36

NYYRIKKI wrote:
ducasp wrote:

That default mirroring on emulators is a fact and I've wasted quite a few hours when making a rom bios for a device that has no mirroring and getting that bios executing twice when debugging. It was a simple 16KB rom and emulators make it mirror since they don't know what it is as it is not on their databases... Tongue

When developing there is quite easy way around it. Put to start of init LD A,H:CP $80:RET NC
This is not standardized way, but it works due to how the init works. (See previous post)

Yeah, not sure if it was you or someone else that told me that work around when I've asked for help, works like a charm Cool

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