Sunrise MoonSound and GFX9000 cartridges died suddenly after a power surge

Yep, it appears that the TL866II Plus is not compatible with the PEEL 18CV8P. However, there is also another problem. On page 4 of the datasheet in the Design Security section it is specified that it can be copy protected. And if we assume that the author of GFX9000 applied this protection to avoid cloning the control logic, therefore the only one who can grant the repair is the author himself.

Isn’t it replicated from the V9990 development kit? I have that kit with a cartridge designed by Henrik Gilvad (pre release to GFX9000). If you or someone needs photos or access to the device for testing/reverse engineering the logic I’m happy to invite them to my home (free coffee and refreshments included).

Basic PLD code based on the IO decoder I made for the V9958 a while ago. Pinout needs to be changed for the actual PLD used and the pinout used on the GFX9000.

Name     z8ty-v9990-r0 ;
PartNo   00 ;
Date     28/04/2018 ;
Revision 00 ;
Designer Jurgen Kramer ;
Company  None ;
Assembly None ;
Location The Netherlands ;
Device   g16V8a ;

/***** Z8TY V9990 I/O read & write decoder ******
 *
 *         _________________
 *         |                |
 *   /M1 --|  1 I/CLK    20 |-- VCC
 *   /RD --|  2 I    O   19 |-- /VDPRD
 *   /WR --|  3 I    I/O 18 |-- /VDPWR
 * /IORQ --|  4 I    I/O 17 |--
 *    A0 --|  5 I    I/O 16 |--
 *    A1 --|  6 I    I/O 15 |--
 *    A2 --|  7 I    I   14 |-- A7
 *    A3 --|  8 I    O   13 |-- A6
 *    A4 --|  9 I    O   12 |-- A5
 *   GND --| 10      I   11 |--·
 *         |                |
 *         ------------------
 *
 */


/**************** INPUT PINS *********************/

PIN        1 = !M1             ; /* Z80 M1, ACTIVE LOW */
PIN        2 = !RD             ; /* Z80 RD, ACTIVE LOW */
PIN        3 = !WR             ; /* Z80 WR, ACTIVE LOW */
PIN        4 = !IORQ           ; /* Z80 IO request, ACTIVE LOW */

PIN [5..9]   = [a0..a4]        ; /* Z80 Adresslines A0-A4 */
PIN [12..14] = [a5..a7]        ; /* Z80 Adresslines A5-A7 */


/**************** OUTPUT PINS *********************/

PIN  19  =  !VDPRD             ; /* VDP RD, ACTIVE LOW */·
PIN  18  =  !VDPWR             ; /* VDP WR, ACTIVE LOW */·


/***** Declaration and Intermediate Variable Definitions *****/

FIELD IOaddress = [a7..a0]      ; /* addr[7:0] */

/* VDP Read and Write, IO port 60h-6fh */
vdp_rd_eqn = IORQ & RD & M1 & IOaddress:[60..6f];
vdp_wr_eqn = IORQ & WR & M1 & IOaddress:[60..6f];

/* outputs */
VDPRD = vdp_rd_eqn;
VDPWR = vdp_wr_eqn;

if you need I have a ALL-11P3 programmer

I was also thinking maybe someone from the Netherlands or Germany (I live on the German border near NRW) who was willing to help out, but it seems it is not needed. Still if it turns out later it is needed the invitation is always open!