Did every one tryed this?

Prophet (3898)

27-03-2022, 15:56

Hi, all. As we know, computers using TMS vdp do they vram access through the VDP chip itself.
this is said to be slow....... (even not so slow as most people complain about)
From a tech point of view the VDP is similar to other video chips, it has a "plus" feature of I/O vram access that other hw did not.
So, it should be possible to implement vram sharing as in other contended systems (ZX, C64, Amstrad CPC for example), i think with a proper mix of latches and buffers.

My question is : some one know about a hw using a similar approach with the z80? Or all TMS uses the I/O approach for the sake of simplicity?

As far i know, the TMS allow 1 access every 32 clocks so maybe with a fixed contention scheme or a latching approach it could be done.....
Is there anyone of a specific reason that does not allow a similar approach to be taken?

PS= I know advram project but here we are talking of MSX1 videochip

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Van st1mpy

Paladin (870)

27-03-2022, 17:30

So are you thinking of modding a msx machine's inside, or put this new vdp in a cartridge? It would be interesting to have a cartridge with a dual port sram shared by msx and the vdp (another one inside the cartridge).

Van PingPong

Prophet (3898)

27-03-2022, 17:37

not exatctly a dual port ram. I'm just trying to investigate if this is somewhat possible without locking too much the CPU and avoiding the risk of loosing byte writes/read as actually happening with the I/O approach.
I've always thought that the VDP should had a kind of hw signal to arbitrate I/O. That is because only the VDP knows when it does need to access VRAM in various situations (screen mode, sprites, vblank etc)
the v9958 had, but it was too late,unfortunately.

Van PingPong

Prophet (3898)

27-03-2022, 23:38

apparently someone used the TMS derivate (SMS) on an arcade machine with shared memory.
https://retrocomputing.stackexchange.com/questions/7693/tms9...

Van Parn

Paladin (791)

28-03-2022, 20:47

@PingPong, I believe you're describing ADVRAM, which was first prototyped by Ademir Carchano around 2003 and is supported by some emulators. I'm not aware of all details, but AFAIK he ran into some roadblocks (IIRC, related to the way the VDP uses the VRAM in high-bandwidth modes), and later some careful benchmarking demonstrated this would not be as advantageous as originally thought, at least in the block operations use case. I don't remember who did this benchmarking, though.

Van PingPong

Prophet (3898)

29-03-2022, 00:03

no, i'm not describing ADVRAM. i know this, and i 'm always been sceptic about the advantage.
they did benchmarks in screen 8 where the 1:1 corrispondence between 1 pixel and 1 byte give clear advantage to the cpu. (because to set a pixel you do not need any read/mask/write operation as in other screen modes).
But on TMS the situation is different: it does not have hw acceleration, plus a direct vram access + a hw wait would have been useful. Plus the amount of VRAM on MSX1 make possible to map the entire vram into a page.

AFAIK there is an arcade console using the TMS derivative on SMS where a similar architecture was used, but nothing on old TMS.

Van Parn

Paladin (791)

29-03-2022, 00:29

Ah, I get it now, sorry for misunderstanding.