NMS8220 Discharge RAM memory faster at powercycle. | MSX Resource Center (Страница 2/2)

Hero (572)

04-03-2017, 20:08

Yesss great idea, the internal rom socket is there. Will build a nuke eprom to kill the AB. Thank you very much for this fine idea!!!

By l_oliveira

Hero (534)

04-03-2017, 21:21

Better idea is make the loader software destroy AB header before executing the rom. As FRS mentioned EXECROM does.

And it's impossible to make the DRAM erase faster. Only fix is replacing them by other brand memory which loses data contents faster. That do vary by manufacturer.

By flyguille

Prophet (3031)

04-03-2017, 21:55

with RAMs like those 3MIN! I don't understand how z80 waste so much time in refreshing....

I remember my MSX2's ram needs atleast 10 seconds to erase itself.

and the refreshing cycle iirc is 7 bits, because it refreshs a whole column / or row maybe? at the same time.

so if it does 128 times per second, it is the same, and don't need to add those wasting refresh cycles in each z80 operation.

By RetroTechie

Paragon (1563)

04-03-2017, 22:15

"Holds some of its contents" != "holds contents reliable". Resulting in the difference in time-between-refresh.

Also: since talking about (mini-)capacitors, if refresh is less frequent, then refresh current must go up to compensate. That might be okay if not overdone (see burst-refresh á la Turbo R). But longer times between refreshes would place greater demands on the DRAM's power supply - even if average current would stay the same. Something you & I could happily ignore as users, but hardware / IC designers not.

By RetroTechie

Paragon (1563)

04-03-2017, 23:48

@Wlcracks: more elegant would be if included in BIOS ROM. That would save the need for an add-in ROM (even if that extra ROM is easy to add ).

Ideally by modifying existing RAM search in the BIOS. That way you'd keep code changes to a minimum & thus it should be easier to squeeze it in somehow. Tbh would kind of surprise me if this hasn't been done already for MSX2 BIOS roms.

By Wlcracks

Hero (572)

05-03-2017, 08:46

@RetroTechie
The empty "application" socket ROM in the 8220 is there SCREAMING for an application
This will be a nice project to start with. First get me this GLASS assembler up and working first.

The nms8220 was my second msx after the vg8020. I had(have) a vy0010 disdrive with it (now with HxC Floppy Emulator). I cannot remember it took like 5 minutes to clear the RAM. Would dram get slower to erase when getting older. Normally capacitors go down in capacity when getting older.

By Wlcracks

Hero (572)

05-03-2017, 11:49

well thats not working, the ram is located in 3-2, the application rom in 3-3
I guess the ram will boot up before the application rom.

in a cart slot it works though.

;nukeAB for NMS8220 in application ROM socket
;by WLCRACKS
;16kROM at slot 3-3 04000H - 07fffH
;written in a 28c256 at 04000h (A14 at pin 1 is always high in socket 8220)

;elektuur: B D E I with 28c256 force written at 04000h

WRSLT: equ 014H

org 04000H

callstat: equ 0
device: equ 0
basic: equ 0

;ROM header

db "AB" ; expansion ROM header
dw initcode ; start of the init code, 0 if no initcode
dw callstat; pointer to CALL statement handler, 0 if no such handler
dw device; pointer to expansion device handler, 0 if no such handler
dw basic ; pointer to the start of a tokenized basicprogram, 0 if no basicprogram
ds 6,0 ; room reserved for future extensions

initcode:

ld a,65
call 09fh

; write 0 at 04000H in slot 3-2

;Input : A - ExxxSSPP
; | || Primary slotnumber (00-11)
; | - Secundary slotnumber (00-11)
; +----------- Expanded slot (0 = no, 1 = yes)
ld a,10001011B
ld hl,04000H
ld e,0
call WRSLT

; write 0 at 04001H in slot 3-2

ld a,10001011B
ld hl,04001H
ld e,0
call WRSLT

;beep on

ld b,2 ; The LSB of the loop is 10
ld d,1 ; The MSB of the loop + the first loop is 3
Loop:
; ... do something here
push bc
push de

call 0c0H

pop de
pop bc

djnz Loop
dec d
jp nz,Loop

hangen:
;jp hangen

ret

By flyguille

Prophet (3031)

06-03-2017, 01:05

RetroTechie wrote:

"Holds some of its contents" != "holds contents reliable". Resulting in the difference in time-between-refresh.

Also: since talking about (mini-)capacitors, if refresh is less frequent, then refresh current must go up to compensate. That might be okay if not overdone (see burst-refresh á la Turbo R). But longer times between refreshes would place greater demands on the DRAM's power supply - even if average current would stay the same. Something you & I could happily ignore as users, but hardware / IC designers not.

I remember playing games without errors after 3 seconds turn off. 5 seconds with errors, and 10 seconds to make sure AB is erased.

IIRC, this wasn't a problem in MSX1, it started in legacy msx2.