MSX HDMI mutlimedia card

Bottom line: mostly the assembled boards are requested.

Once debugged, it would be necessary to find the faithful manufacturer (better in China to reduce the assembly cost) and also define the way how to rise up the funds and then make a collective order with the individual delivery....

Logistically speaking it would be excellent to get all the boards assembled in China to reduce the costs. But then, it is important to program & test the cards. I can do that, but it might take quite a lot of personal time (debugging of the bad ones). So, in order to optimize it all, PCBs must be ordered with the electrical testing, components must be also pre-ordered with the incoming Component Test (CT) whenever possible.

Plan A: The yield can be fixed at 90% (1+ card per 10 cards) for example and then manufacture under the above conditions. The cards can be delivered to me first (shipping from China or the US to me + customs taxes for the import), then programmed and tested. Then I can send the cards individually to all the participants (+shipping from me to the requesters).

Plan B: outsource the funding, assembly, quality check and programming to China. Shall we risk this in the first round?

Plan C: outsource the funding, assembly & quality check to the US. The quotes must be obtained, but could be more $$$ for assembly + PCB costs.....

What would be your suggestions?

Does anyone have an experience in building small series, testing and configuring them and sending to the individual addresses?

Last thing: do we need the plastic box for the card in these "beta testing" series?

Well, replacing OCM is not the main purpose of this card.

IMHO, still this is what can be done to get the OCM like design into it:

1. Here we are at the limit of TQFP144 in Xilinx Spartan6 family already (no alternative). The next stop is BGA -> 4 layers board. But since the majority willing to get the card assembled, BGA can be also considered, but penalty is the cost and assembly complexity.

2. Regarding Altera and Xilinx differences, I was talking about the OCM memory buffers mapped into Altera BLOCK RAM and using up all the Xilinx distributed LUT RAM instead.
The problem is in the OCM asynchronous memory buffers design architecture, which is incompatible with the Xilinx synchronous BLOCK RAM interface (Mentor Graphics RED BOOK design & reuse guide).

3. So, the OCM must be either stripped off the features to fit Procyon or being re-designed to be compatible with Xilinx technology (same for ASIC).

I prefer the second path (re-design), since already the memory scheduler, memory controller and VDP must be redesigned anyway in order to increase the bandwidth to at least 200MB/s in the page/bank interleaved burst mode. The OCM memory controller unfortunately doesn't know about banks, bursts and interleaves .

What is left of OCM can be re-used as is (respecting the license), for exception of the PWM DAC, since inhere there is an AC97 codec instead. Also would be cool to place the PSG/SCC waveform memory directly into SDRAM. This way, for example, 5+3 stereo 16 bit sample channels can be organized.

Also the new design can be compatible with the MentorGraphics RED BOOK design guidelines for easy porting from one silicon manufacturer to the other (same for the license).

Well, building up the funds and finding one stop shop is essential. Preferably no BGAs in the first round, otherwise the boards must go through the oven to be repaired. Also prefer somewhere in Europe or the US, but not China, since setting up the tooling and communicating would be difficult for small series as you have mentioned too.

Sure. BTW if you strip CPU (which we have in MSX anyway) I think it could fit even without re-design.
On the other hand re-design looks like necessary. In this case we should start with a simple configuration, say VDP mimic for video and PSG mimic for sound test.

Thank you,

I'm leaning more and more towards the one stop shop in the US (backup - Europe) to get the PCBs manufactured and all the components sourced. If we pay 200% - doesn't matter for the beta testing, IMHO, better to get something working than a complete flop. Can't be more expensive, than I've payed already for the 3 US made PCBs and 3 sets of components. There are many companies, especially in the US with the great PCB quality, offering the assembly and sourcing too. IMHO, this could be a possible solution. This way we will not pay the transit tax. US company will manufacture the PCBs and stuff the components from the US source. Quite likely all the cards can be operational then. The only problem I see is the post-assembly configuration & test.

As a possible solution, maybe I can supply FLASH EEPROM ICs already being programmed with the POST(Power On Self Test) design, such that the manufacturer will be able to plug the card to the DC source and LCD monitor, and check whether the card is operational.
Then, once tested and posted to the end user, the user him/herself will re-program the card @HOME with the target configuration.
Procyon supports the basic DFU mode via:
1. the MSX slot being in the MSX computer (MSX DFU application is still to be designed)
2. onboard USB link (PC application is not ready yet either).

The other three more hard core configuration methods are:
3. JTAG USB XILINX cable
4. SPI FLASH<->USB/parallel port cable from arduino
5. SPI FLASH cartridge biggyback board.

Actually 3.57MHz VDP->CPU clock + RESET lines are used to genlock the H/V sync counters and keep the synchronous operation of the write-only cartridge VDP and the main board V9938/58. If the VDP and CPU clocks are asynchronous, then this solution will get into the trouble you are describing.

Then to get better performance w/o waitstates or to run a different VDP model, yes the other set of ports and a shadow bios have to be used (see ACCELERATION mode description at the beginning of the thread).