ASCII S1990
Description
The S1990 is a system control LSI chip developed by ASCII Corporation in 1990 and manufactured by ASCII Mitsui & Co. Semiconductor Co., Ltd. for MSX turbo R. It contains a equivalent Z80 CPU to maintain compatibility with conventional MSXs and functions to control the system and to switch the Z80/R800 CPU.
The features are:
- Debug functions
- Address Comparator: Monitors the R800 address bus and generates NMI when the specified address is accessed. To enable this function, address bus A8h must be set low during the reset period of S1990.
- Debug monitor slot register: A control register that enables the slot environment in which the debug monitor operates while the debug monitor is operating when the address comparator is enabled.
- NMI status register: When the above address comparator is valid, this register stores the cause of NMI generated by the system LSI.
- NMI return address register: Holds the last written 2-byte value (return address to the user program) immediately before transitioning to the debug monitor. This register is readable/writable, and in some cases it is possible to rewrite the return address arbitrarily and return to a different address.
- Break: When the address comparator is enabled and the pause key enable bit is disabled, pressing the pause key arbitrarily during user program execution can cause a break and transfer processing to the debug monitor.
- Peripheral device interface
- Auto fire interface
- FDD interface
- FM sound generator interface
- Kanji ROM interface
- Memory Mapper
- Panasonic mapper
- Pause function
- PCM interface
- VDP interface
- System control
- R800 CPU/Z80 CPU control, bus control, data buffer control
- MSX slots control, Memory Mapper control, I/O addresses decoding
- Z80 bus timing simulation
- Memory access, I/O access, RFSH/M1 signal simulation
Computers with the S1990
Links
- S1990 registers and I/O access waits (Japanese)